Old Bally Self Test Sequence 1. MPU MODULE SELF-TEST: The MPU module has, as part of integrated circuit E-720-XX (U6), a program designed to test the module each time power is turned on. No action is required on the Operator's part to initiate the test. The program causes the MPU chip to test itself, the program containing integrated circuits U1 thru U6, the scratch pad memory U7, the non-volatile scratch pad memory U8, each of the input-output chips (peripheral interface adaptors: PIA) U 10 and U 11, and the display and zero crossing interrupt generator circuits. If the MPU finds all circuits in proper operating order, it initializes the game and makes it ready for play. If the MPU module finds a fault during the course of the Self-Test,it stops at that point in the test and does not allow game play. The accuracy of the MPU Self-Test is about 99.5%. The MPU module catches all faults except buffer amplifier problems ('B' ports) in the PIA chips. These can easily be detected later by use of the AID1 module. The interesting idea behind the MPU Self-Test is that it not only prevents game play when faults are detected, but also helps localize these faults. This is illustrated by means of page 3, borrowed from F.O. 560. The LED on the MPU module flashes once for each successfully completed test. Simply counting the number of flashes of the LED after power-up localizes the fault to the offending circuit on the module. 1 ST FLICKER: On power-up, the MPU chip (U9), requires that + 5 ~ .25VDC be applied before the reset line is allowed to swing from 0 to + 4.8VDC. It also requires the presence of a two-phase, non-overlapping clock pulse. If these conditions are met, and if the MPU chip itself is good, the LED on the module flickers briefly. F.0.560, page 29, deals with fault localization if the LED indicates a fault (LED always 'on' or `off'). The brief flicker indicates the operation is proper. The MPU has gone out to memory. It has obtained the starting address of the Self-Test from memory. The flicker indicates that it then went to that address and started to execute the Self-Test program. The Valid Power Detector circuit on the MPU module works with the + 5VDC regulator Q20, on the Solenoid Driver/Voltage Regulator module to prevent the reset line from going high until + 5VDC is proper at the MPU chip. Q20 is guaranteed by the manufacturer to go into regulation when + 7.5VDC is applied to its input. This means that when the game is turned on and a sufficient period of time (milliseconds) has passed so that C23 (11,700mf) has charged to a + 7.5VDC level, Q20 switches into regulation and sup- plied + 5VDC to the MPU chip. However, Q1 in the Valid Power Detector circuit does not allow the MPU chip to turn `on' until some time later. The Zener Diode (VR1), in series with the base of Q1 delays ap- plication of the reset voltage until C23 charges to an 8.9VDC level ( + 8.2V across VR1 and + .7V base- emitter junction drop across Q1 ). At that point in time, Q1 and Q5 go into conduction, and the reset line at the MPU is caused to go high ( + 4.8VDC). Only then is the MPU chip 'on'. The importance of the Valid Power Detector circuit can be appreciated when the following fact is known: Should the reset line be allowed to go high before the + 5VDC is applied and proper, or should the 5VDC supply fail and go out of regulation, the MPU can jump out of the program. The reason that this happens is that the MPU goes out to the program memory bank U1-U6 for instructions. The logic levels are wrong because the + 5VDC is not proper. The MPU misinterprets the data, jumps out of the program, and writes its own program! The MPU at that point in time is like a train that has left the tracks. It can end up anywhere. The difference is that the train eventually stops. The MPU may continue as long as the clock circuit con- tinues to run. If the MPU chip jumps out of the program, it is said to be in `run-away'. While it is creating its own program by going out for instructions and executing anything that it gets from memory that looks like an instruction, it in- variably overwrites the Bookkeeping functions in U8, the non-volatile scratch pad RAM. An indication of 'run- away', then, can be false data in the bookkeeping functions. Probable cause: faulty Q20, leaky C23 (high ripple) or leaky zener diode, (VR1, MPU module). FIRST FLASH: The MPU chip next goes out to program memory bank U1 thru U6 (Read Only Memory). It tests each chip, one at a time. When it finds the bank correct, it flashes the LED the first time to indicate its finding. A fault in the memory bank then is indicated by the absence of the first flash. How the MPU tests each memory chip can be illustrated by the following: In a game with chips U2 and U6, the MPU will first go to U2. It will fetch the first byte in U2, it will add to it the second byte in U2. It will add to the sum the third byte in U2. It will continue until it has summed all 2048 bytes in U2. If the sum is `0000 0000', the MPU proceeds to U6 and repeats the process. It U6 has a sum of '0000 0000', the MPU causes the LED to flash the first time. Fault in either U2 or U6, of course, is indicated by the absence of the flash. The contents of each chip have byte locations called checksums reserved for this test routine. There is one checksum byte reserved in each 512 bytes of program memory. The programmer at Bally must insert a byte with the proper value in each checksum byte location to force each 512 byte checksum to equal '0000 0000'. During the life of the electronic game, if a chip in the program memory bank U1 thru U6 fail by so much as changing a single bit in its 2048 bytes X 8 bits/byte = 16,384 bit contents, it will be detected during the MPU test. The MPU will not allow play until the defective chip is located and replaced. SECOND FLASH: The MPU chip, thru the program, goes out to NMOS RAM U7 (Read/Write Memory). It erases the contents of the first byte in U7 (U7 is 128 full bytes of 'scratch pad' memory). It then tries to read back the word '0000 0000' (indicating `erased' or cleared). If it can read it back it continues to add 1, write and read until, 256 tries later, it writes in the word 1111 1111. If it can read this back, it has determined that the first byte in U7 is good. It repeats the process for each of the 127 remaining bytes, one byte at a time. If, at the end of these 256 X 128 = 32,768 tests, each time the MPU writes, it can read the same word correctly, the MPU chip causes the LED to flash the second time. If U7 is defective, the MPU will not allow game play until it is replaced. It is to be noted that there is a pause between the first and second flash of the LED during the MPU Self- Test. This pause represents the actual time necessary to do the 32,768 individual test cycles involved in testing U7! THIRD FLASH: The MPU chip goes out to the CMOS RAM U8 (Read/Write memory). It makes a copy of the contents of the first half byte in U8. This is necessary because U8 is the battery supplied, non-volatile memory location where the book keeping functions are stored. It then erases the contents of the first half byte in U8 (U8 is 256 half bytes of 'scratch pad' memory). It then tries to read back the word '0000 XXXX' (where `XXXX' are bit locations to be ignored). If it can read it back, it adds '1 ' to the previous word (new word, '0001 XXXX'). It continues to write and read until it reaches and reads the word '1111 XXXX'. When this is done successfully, the MPU restores the original contents to the first byte Located in U8. It then makes a copy of the contents of the second byte and repeats the process. It repeats the process for each of the remaining 254 bytes, one byte at a time. If, at the end of these 256 X 16 = 4096 tests, each time the MPU writes, it can read the same word correctly, the MPU causes the LED to flash the third time. If U8 is defective, the MPU will not allow game play until it is replaced. FOURTH FLASH : The MPU chip, thru the program, now tests the first PIA chip, U10. Each of the two PIA chips (U10 and U11 ) is identical and interchangeable. The test for both is also identical. PIA chip U10 is accessed by means of decoder inputs RS0, RS1, CS0, CS1, and CS2. These inputs are used to control the PIA. By means of these lines, each bit of two full byte sets of ports can be initialized to be either an input or an output. These ports are labeled PAO thru PA7 and PBO thru PB7 on the MPU schematic. Also by means of these lines, two ports, CA2 and CB2 can be initialized as either inputs or outputs. Finally, two additional ports, CA1 and CB1, designed to be used as inputs only, can be initialized to trigger on a positive or negative going edge. These ports on PIA's U10 and U11 are used as interrupt inputs, to be discussed later. To determine if each of the two PIA chips is good, the MPU chip, thru the program, does the following : 1. It accesses, by means of inputs RS0, RS1, CS0, CS1 and CS2 each of the two full byte registers used to store the port initialization information. It does this, one register at a time. After it completes the first register, it repeats for the second. It goes thru 256 tests similar to that used to check each byte in U7 2. It accesses, by means of inputs RS0, RS1, CS0, CS1 and CS2, each of two full byte registers used as data output registers when PAO thru PA7, PBO thru PB7 are used as outputs. It does the same type of test on each register described in 1 ) above. Again, if no faults are found, the test is continued to completion. A fault detected stops the test. Game play is not permitted until the PIA is replaced. 3. It then accesses, by means of inputs RS0, RS1, CS0, CS1 and CS2, first the CA2 and then the CB2 port. The port is initialized as an output. The port is then written into to see if it can store a ' 1 ' and then a '0'. When both ports are found good, the MPU causes the LED to flash the Fourth Time. The CA1 port on U 10 is tested manually each time the Self-Test switch on the inside of the front door is activated. The CB1 port is tested later as the Seventh Flash. A total of 4 X 256 + 4 = 1028 test steps are required to test each of the two PIA chips. However, there are internal buffer amplifiers used with the PBO thru PB7 output register and CB2 port register whiCh cannot be tested by the MPU (access.is only to the register - if the buffer is open, it does not in- terfere with the register's ability to be written into and read from by the MPU). It is this uncertainty that reduces the accuracy of the MPU Self-Test to 99.5%. Fortunately, open buffer amplifiers are easily detected and quickly located by means of the AID1 module. FIFTH FLASH : Identical to the test procedure and results detailed for the Fourth Flash except: 1. The CA1 port on U 11 is tested later as the Sixth Flash . 2. The CB1 port on U11 is tested by the AID1 module. If the game cannot be made to go into the AID mode, the port is defective. (See discussion under AID1 Module Self-Diagnostic Tests) SIXTH FLASH : The MPU chip, thru the program, monitors PIA1, port CB1 (U 10). If transitions from high to low are detected, the MPU decides that the zero crossing detector is working. It then causes the LED to flash the Sixth time. If U14 fails and the CB1 line is stuck high or stuck low the MPU chip will not allow game play until the chip is replaced. It is to be noted that the zero crossing detector circuit input is the + 43VDC line to the solenoid common. If the fuse in that line (F4 on the Power Transformer module) is blown when the power is turned on, the MPU will not allow game play until the fault on the + 43VDC line is corrected. SEVENTH FLASH: The MPU chip now monitors PIA2, port CA1 (U11). It transitions from high to low are detected, the MPU decides the Display Interrupt Generator is working. It causes the LED to flash the Seventh time. The MPU then enters the part of the program that deals with the initialization of the game prior to play. If U 12, a 555 timer, or any associated circuit component, fails, the MPU chip will not allow game play until the fault is corrected